Record Details

Compiler Techniques For Code Size And Power Reduction For Embedded Processors

Electronic Theses of Indian Institute of Science

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Field Value
 
Title Compiler Techniques For Code Size And Power Reduction For Embedded Processors
 
Creator Sarvani, V V N S
 
Subject Microprocessors
Embedded Systems
Compilers
Embedded Processors
Computer Science
 
Contributor Govindarajan, R
 
Date 2011-04-28T09:32:58Z
2011-04-28T09:32:58Z
2011-04-28
2004-06
 
Type Thesis
 
Identifier http://etd.iisc.ernet.in/handle/2005/1135
http://etd.ncsi.iisc.ernet.in/abstracts/1489/G18678-Abs.pdf
 
Language en_US
 
Relation G18678