Record Details

DSpace at IIT Bombay

View Archive Info
 

Metadata

 
Field Value
 
Title Application of look-up table approach to high-K gate dielectric MOS transistor circuits
 
Names VINAY KUMAR, D
MOHAPATRA, NR
PATIL, MB
RAMGOPAL RAO, V
Date Issued 2003 (iso8601)
Abstract In this paper, we study the circuit performance issues of high-K gate dielectric MOSFETs using the Look-up Table (LUT) approach. The LUT approach is implemented in a public-domain circuit simulator SEQUEL. We observed an excellent match between LUT simulator and mixed mode simulations using MEDICI. This work clearly demonstrates the predictive power of the new simulator, as it enables evaluation of circuits directly from device simulation results without going through model parameter extraction.
Genre Article
Topic Mosfet Circuits
Identifier Proceedings of the 16th International Conference on VLSI Design, New Delhi, India, 4-8 January 2003, 128-133