Improving On-state current and Ambipolarity of TFET using Gate-Drain and Gate Dielectric Engineering
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Title |
Improving On-state current and Ambipolarity of TFET using Gate-Drain and Gate Dielectric Engineering
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Creator |
Avinash, Ganta
Saini, Gaurav |
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Subject |
Ambipolarity
Gate overlapping TFET Tunnelling barrier width |
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Description |
607-613
This article presents the Gate Overlap on Drain with Hetero Gate Dielectric TFET (GDHD-TFET), a novel tunnel FET structure aimed at addressing the low ON current and ambipolar leakage observed in traditional TFETs. By investigating the combined effects of hetero gate dielectric and gate-drain overlapping, the GDHD-TFET offers a significant improvement in design compared with conventional TFET design. Unlike traditional approaches that focus solely on regulating the tunnel barrier widths at the channel-source junction, the GDHD-TFET simultaneously improves the tunnel barrier widths at both channel-source and channel-drain junctions. As a result, the GDHD-TFET achieves remarkable improvements in ON current and ambipolar conduction, surpassing traditional TFET performance by factors of 102 and 104, respectively. Furthermore, it maintains low subthreshold swing (SS) of 29.3 mV/dec indicating its potential for low-power applications. |
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Date |
2024-08-05T09:33:22Z
2024-08-05T09:33:22Z 2024-08 |
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Type |
Article
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Identifier |
0975-0959 (Online); 0301-1208 (Print)
http://nopr.niscpr.res.in/handle/123456789/64312 https://doi.org/10.56042/ijpap.v62i7.7715 |
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Language |
en
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Publisher |
NIScPR-CSIR,India
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Source |
IJPAP Vol.62(07) [July 2024]
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